Technology · Dev
Montage Ships First CXL 3.2 Controller for AI Data Center Memory
Chinese chip designer begins pilot production of memory expansion controller backed by Samsung and SK Hynix, targeting capacity constraints in AI infrastructure

KEY TAKEAWAYS
- ·Montage Technology has started pilot production of a CXL 3.2 memory expansion controller with backing from Samsung and SK Hynix, addressing AI data center memory bottlenecks.
- ·The controller enables memory pooling across servers using the latest Compute Express Link specification, allowing flexible capacity scaling beyond traditional DIMM constraints.
- ·Montage's early production timing positions the Chinese chip designer ahead of Western competitors in CXL 3.2, though volume deployment depends on ecosystem readiness and server platform validation.
Montage Advances Memory Pooling for AI Workloads
Montage Technology has started pilot production of a CXL 3.2 memory expansion controller, marking an early move in the race to address memory bottlenecks in artificial intelligence infrastructure. The Chinese chip designer positions the controller as the first commercial implementation of the latest Compute Express Link specification, targeting data centers that increasingly struggle with memory capacity constraints as AI workloads scale.
The controller enables memory pooling and expansion across servers, a critical capability as large language models and training clusters demand terabytes of accessible memory beyond what traditional DIMM slots can provide. Montage announced support from Samsung Electronics and SK Hynix, the two largest memory manufacturers globally, signaling alignment between controller technology and the memory modules that will populate CXL-enabled systems.
CXL 3.2, released in late 2025, introduced improvements in bandwidth, latency, and fabric scalability over the previous 2.0 generation. The specification allows processors to access memory attached via PCIe lanes as if it were local DRAM, breaking the physical constraint of memory channels directly wired to CPUs. For hyperscalers and AI-focused cloud providers, this translates to more flexible memory allocation, higher utilization rates, and the ability to share expensive high-bandwidth memory across multiple compute nodes.
Memory Capacity Crunch Drives Adoption
Data center operators face a structural mismatch between processor capability and memory supply. Modern AI accelerators and high-core-count CPUs can saturate memory bandwidth faster than DDR5 channels can deliver, while training runs for frontier models routinely exceed the memory capacity of individual servers. CXL offers a path to decouple memory scaling from processor architecture, allowing operators to add capacity without redesigning motherboards or waiting for the next CPU generation.
Montage's move into production comes as memory suppliers report tight allocation for 2027. Industry sources indicate that DRAM and high-bandwidth memory capacity has been largely committed through advance orders, with AI infrastructure builders securing volume ahead of expected shortages. CXL controllers and compatible memory modules represent an additional layer of complexity in the supply chain, requiring coordination between controller vendors, memory manufacturers, and server OEMs.
Samsung and SK Hynix have both demonstrated CXL-attached memory modules in recent quarters, but commercial deployment has lagged behind initial roadmaps. The involvement of both suppliers in Montage's pilot production suggests that CXL 3.2 controllers and corresponding memory are moving closer to volume shipments. For Montage, a company known primarily for DDR and LPDDR interface chips, the CXL controller represents a strategic expansion into higher-value data center components.
Regional and Competitive Context
Montage's progress carries additional weight in the context of semiconductor regionalization and supply chain diversification. Chinese firms face restrictions on access to leading-edge logic processes and advanced packaging, but memory interface technology remains an area where domestic players can compete. CXL controllers do not require cutting-edge process nodes, and the specification is open, allowing multiple vendors to develop compatible products.
Western and Korean competitors, including Rambus and Astera Labs, have announced CXL controller roadmaps, and Intel has integrated CXL support into recent Xeon processors. Montage's claim to first production of a CXL 3.2 controller, if sustained, positions the company ahead of rivals in time-to-market, though volume deployment will depend on broader ecosystem readiness, including server platform validation and software stack maturity.
The backing from Samsung and SK Hynix also reflects the memory industry's interest in CXL as a growth vector. Both companies face margin pressure in commodity DRAM and are investing in differentiated products tied to AI infrastructure. CXL-attached memory commands a premium over standard DIMMs, and early partnership with controller vendors helps secure design wins in next-generation platforms.
Montage has not disclosed production volume targets, customer names, or pricing for the CXL 3.2 controller. Pilot production typically precedes mass production by several quarters, during which yields are optimized and customers complete qualification testing. The timeline for widespread CXL 3.2 deployment in data centers will depend on server OEM adoption, hyperscaler validation, and the availability of compatible memory modules at scale.
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